Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.
Job Overview:
Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.
Responsibilities include:
Digital design for PLL, DAC, ADC, LDO, APM, and other mixed-signal designs.
Digital design aspects include full behavioral level description with high level synthesis languages and gate level synthesis, logic level synthesis, timing closure, power and signal integrity analysis and testability.
Work in a dynamic team environment with aggressive schedule, chip power consumption and area targets.
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field.
3+ years ASIC design experience
Digital ASIC design including architecture
RTL design for control and datapath, linting, synthesis, FV, STA, and DFT
Experience with leading-edge ASIC development tools from Synopsys, Mentor, or Cadence
Education Requirements: Bachelor's, Electronics / Electronics & communication Engineering
Preferred: Master's, Electronics / Electronics & communication / VLSI Engineering
Applicants: If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email toaccommodationsupport
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If you would like more information about this role, please contact Qualcomm Careers.
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