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Design Implementation Engineer - Staff / Sr Staff (Austin, TX)

Qualcomm Inc.
Austin, TX 78701
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Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Job Overview:

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.

GENERAL SUMMARY

Qualcomm CDMA Technologies is the world leader in wireless ICs powering the majority of 4G and 5G devices and the largest fabless semiconductor company in the world. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills. This is a great opportunity to join a fast-paced team responsible for delivering Snapdragon DDR subsystem and flows for high performance SoCs in sub-10nm process for mobile space.

As Digital Implementation Engineer, you will be in charge of front-end implementation for various components of the DDR memory controller subsystem. In this position, you will have the opportunity to work on IPs that are GHz class designs in the latest process geometries available. You will receive RTL deliveries, generate the corresponding netlist, and provide Hard Macro hand-off to the physical design team. Your strong understanding of the IPs will be necessary to put correct recipes in place that achieve the best Power Performance Area trade-off. You will also serve as a bridge with the physical design team, and you'll work in collaboration to maintain the performance of the IPs across various implementation stages. This includes creating experiments and performing detailed comparison analysis to improve quality of results.

Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field.
5+ years ASIC design, verification, or related work experience.

Preferred Qualifications
Master's Degree in Engineering, Information Systems, Computer Science or related field.
10+ years Hardware Engineering experience or related work experience
5+ years using physical synthesis tools: Synopsys DC-NXT or Fusion Compiler or Cadence Genus
5+ years of experience doing static timing analysis to develop constraints and analyze timing
5+ years of experience using Primetime, PERL, and TCL, along with work using front-end design tools/flows including formal verification
3+ years of low power specification (UPF), optimization, and constraint verification, etc.
3+ years of experience with PD tools/flows
Independent thinker with good communication and team playing skills

Physical Requirements
Frequently transports between offices, buildings, and campuses up to mile.
Frequently transports and installs equipment up to 5 lbs.
Performs required tasks at various heights (e.g., standing or sitting).
Monitors and utilizes computers and test equipment for more than 6 hours a day.
Continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely.

Qualcomm CDMA Technologies is the world leader in wireless ICs powering the majority of 4G and 5G devices and the largest fabless semiconductor company in the world. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills. This is a great opportunity to join a fast-paced team responsible for delivering Snapdragon DDR subsystem and flows for high performance SoCs in sub-10nm process for mobile space.

As Digital Implementation Engineer, you will be in charge of front-end implementation for various components of the DDR memory controller subsystem. In this position, you will have the opportunity to work on IPs that are GHz class designs in the latest process geometries available. You will receive RTL deliveries, generate the corresponding netlist, and provide Hard Macro hand-off to the physical design team. Your strong understanding of the IPs will be necessary to put correct recipes in place that achieve the best Power Performance Area trade-off. You will also serve as a bridge with the physical design team, and you'll work in collaboration to maintain the performance of the IPs across various implementation stages. This includes creating experiments and performing detailed comparison analysis to improve quality of results.

Minimum Qualifications

  • Bachelor's degree in Science, Engineering, or related field.
  • 5+ years ASIC design, verification, or related work experience.

Preferred Qualifications

  • Master's Degree in Engineering, Information Systems, Computer Science or related field.
  • 10+ years Hardware Engineering experience or related work experience
  • 5+ years using physical synthesis tools: Synopsys DC-NXT or Fusion Compiler or Cadence Genus
  • 5+ years of experience doing static timing analysis to develop constraints and analyze timing
  • 5+ years of experience using Primetime, PERL, and TCL, along with work using front-end design tools/flows including formal verification
  • 3+ years of low power specification (UPF), optimization, and constraint verification, etc.
  • 3+ years of experience with PD tools/flows
  • Independent thinker with good communication and team playing skills

Physical Requirements

Frequently transports between offices, buildings, and campuses up to mile.

Frequently transports and installs equipment up to 5 lbs.

Performs required tasks at various heights (e.g., standing or sitting).

Monitors and utilizes computers and test equipment for more than 6 hours a day.

Continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely.

Minimum Qualifications

Education:

Work Experiences:

Certifications:

Skills:

Preferred Qualifications

Education:

Work Experiences:

Certifications:

Skills:

Applicants: If you are an individual with a disability and need an accommodation during the application/hiring process, please call Qualcomms toll-free number found here for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm is an equal opportunity employer and supports workforce diversity.

To all Staffing and Recruiting Agencies:Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

If you would like more information about this role, please contact Qualcomm Careers.


We are engineers, scientists and business strategists. We are from many different countries and speak many different languages. We come from diverse cultures and have unique perspectives. Together, we focus on a single goalwe invent breakthrough technologies that transform how the world connects, computes, and communicates.

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Posted: 2021-06-11 Expires: 2021-07-12
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Design Implementation Engineer - Staff / Sr Staff (Austin, TX)

Qualcomm Inc.
Austin, TX 78701

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